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SOA improvement by a double RESURF LDMOS technique in a power IC technology

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4 Author(s)
Parthasarathy, V. ; Semicond. Products Sector, Motorola Inc., Mesa, AZ, USA ; Khemka, V. ; Zhu, R. ; Bose, A.

This paper presents a technique that provides double RESURF action in a lateral power MOSFET controlled through an independently biased terminal thereby realizing a two-fold improvement in electrical static SOA over single RESURF lateral device structures at high drain voltages. The technique has been successfully implemented to realize a high-side capable lateral power MOSFET with BV/sub dss/ of 61 V and specific on-resistance (R/sub dson/A) of 0.54 m/spl Omega/-cm/sup 2/ and with a maximum electrical static operating current of 1.9 A/cm at a drain to source voltage of 54 V.

Published in:

Electron Devices Meeting, 2000. IEDM '00. Technical Digest. International

Date of Conference:

10-13 Dec. 2000