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Thin-body transistors with silicide source/drains were fabricated with gate-lengths down to 15 nm. Complementary low-barrier silicides were used to reduce contact and series resistance. Minimum gate-length transistors with T/sub ox/=40 /spl Aring/ show PMOS |I/sub dsat/|=270 /spl mu/A//spl mu/m and NMOS |I/sub dsat/|=190 /spl mu/A//spl mu/m with V/sub ds/=1.5 V, |V/sub g/-V/sub t/|=1.2 V and, I/sub on//I/sub off/>10/sup 4/. A simple transmission model, fitted to experimental data, is used to investigate effects of oxide scaling and extension doping.
Date of Conference: 10-13 Dec. 2000