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Effects of build-up printed circuit board thickness on the solder joint reliability of a wafer level chip scale package (WLCSP)

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2 Author(s)
Lau, J.H. ; Agilent Technol., San Jose, CA, USA ; Lee, S.W.R.

The creep analyses of solder-bumped wafer level chip scale packages (WLCSP) on build-up printed circuit boards (PCB) with microvias subjected to thermal cyclic loading are presented. The emphasis of this study is placed on the effects of the thickness of the conventional PCB with a microvia build-up layer on the solder joint reliability of the WLCSP assembly. The 62Sn-2Ag-36Pb solder joints are assumed to follow the Garofalo-Arrhenius steady-state creep constitutive law. The shear stress and creep shear strain hysteresis loops, shear stress range, creep shear strain range, and creep strain energy density range at different locations in the corner solder joint are presented for a better understanding of the thermal-mechanical behaviors of the solder-bumped WLCSP on build-up PCB with microvia circuits. It is found that, due to the large coefficient of thermal expansion of the build-up resin, the effects of thickness of the conventional PCB with microvia build-up layer become much more significant than that without the microvia build-up layer

Published in:

Electronic Materials and Packaging, 2000. (EMAP 2000). International Symposium on

Date of Conference:

2000

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