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Improving the performance and efficiency of an adaptive amplification operation using configurable hardware

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4 Author(s)
Wirthlin, M.J. ; Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA ; Morrison, S. ; Graham, P. ; Bray, B.

An adaptive amplification operation has been designed and tested in configurable hardware for a computationally intensive object recognition system. This configurable system provides over forty-one times the throughput of an industry-standard embedded processor by exploiting the bandwidth of internal block memories and parallelism within the algorithm. Operating at less than one half the power of the programmable processor, the configurable approach performs the computation with 90 times less energy. The improvements in both performance and power are obtained by customizing the datapath, memory interfaces, and control to the amplification algorithm

Published in:
Field-Programmable Custom Computing Machines, 2000 IEEE Symposium on

Date of Conference: 2000

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