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A new top gate polysilicon thin-film transistor (TFT) architecture is introduced which requires only a single laser process step to simultaneously crystallize the channel and activate the source-drain. The dummy-gate TFT (DGTFT) uses a light blocking layer patterned with the gate mask combined with two backside expose steps to allow a self-aligned device structure. N-channel TFTs fabricated using the new process have field effect mobilities greater than 100 cm/sup 2//Vs. By controlling the backside exposures it is also possible to form offset or graded doping structures to reduce field enhanced leakage currents.