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Modeling a verification test system for mixed-signal circuits

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3 Author(s)
Bello, D.S.S. ; Mesa+ Res. Inst., Twente Univ., Enschede, Netherlands ; Tangelder, R. ; Kerkhoff, H.

In contrast to the large number of logic gates and storage circuits encountered in digital networks, purely analog networks usually have relatively few circuit primitives (operational amplifiers and so on). The complexity lies not in the number of building blocks but in the complexity of each block and the need to test a range of parameters-for example, gain, bandwidth, and signal-to-noise ratio. Degraded circuit performance as well as nonfunctional operation must be checked. Thus, circuit complexity rather than volume complexity is the dominant problem in analog test, and testing mixed-signal circuits entails more difficulties than testing purely digital circuits. In IC manufacturing, circuits traditionally move from design to test with little thought about how each department's activities affect those of the other. This lack of foresight almost always results in iteration cycles between design and test to realize a testable design that also satisfies the specification. We need a bridge between design and test phases to enable a smooth transition. An integrated approach whereby both teams understand each other's requirements is a big step in the right direction; interaction between design and test databases significantly increases the degree to which design and test development can operate as concurrent processes; some work has already been done in this area. Our goal was to build Spice models for the instruments incorporated in the IntegraTest system so that we could simulate the tests this system conducts during design. The models are based on manufacturer specifications, and control parameters used in the models are as close as possible to those in the instruments. To make changes in the models transparent to users, entering of parameters is isolated from the models' internal construction. After building the models, we compared the results of the simulated tests with results from actual tests performed with real instruments

Published in:

Design & Test of Computers, IEEE  (Volume:18 ,  Issue: 1 )

Date of Publication:

Jan/Feb 2001

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