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Design and implementation of a switched-current memory cell for low-power and weak-current operations

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3 Author(s)
Chunyan Wang ; Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada ; M. O. Ahmad ; M. N. S. Swamy

This paper describes the design and implementation of a new switched-current (SI) memory cell for current-mode signal processing. The SI memory cell operates in a pico-to-nanoampere range. To obtain an acceptable accuracy, a procedure to reduce the negative effects of the nonideal characteristics of MOS transistor in SI circuits is proposed and implemented. A prototype circuit including the new SI memory cell associated with optical sensors has been fabricated with a 0.35-μm n-well technology. The test results show that, in a range of 0.5 pA to 15 nA, the error rate of current memorization/reproduction in the proposed SI memory is below 1% and the power dissipation is in a range of nanowatts or below

Published in:

IEEE Journal of Solid-State Circuits  (Volume:36 ,  Issue: 2 )