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An efficient parallel transparent BIST method for multiple embedded memory buffers

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3 Author(s)
D. C. Huang ; Dept. of Comput. Sci., Nat. Chung-Cheng Univ., Taiwan ; W. B. Jone ; S. R. Das

In this paper, we propose a new transparent built-in self-test (TBIST) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent test interface is designed to perform testing in the normal mode and to cope with nested interrupts in a realtime manner. The circular scan test interface facilitates the processes of both test pattern generation and signature analysis. By tolerating redundant read/write/shift operations, we develop a new march algorithm called TRSMarch to achieve the goals of low hardware overhead, short test time, and high fault coverage

Published in:

VLSI Design, 2001. Fourteenth International Conference on

Date of Conference:

2001