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An algorithmic 15-bit CMOS digital-to-analog converter

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2 Author(s)
M. J. M. Pelgrom ; Philips Res. Labs., Eindhoven, Netherlands ; M. Roorda

A digital-to-analog converter (DAC) has been designed which uses an algorithm based on interpolation. The algorithm ensures monotonicity and differential linearity despite offset voltages, and hence eliminates the need for trimming. The technique has been used to design a 15-bit DAC in a 2.5-μm CMOS technology. The converter features S/(N+THD) of 74 dB with a dynamic range of 87 dB and a power consumption of 22 mW at 44-kHz sample frequency

Published in:

IEEE Journal of Solid-State Circuits  (Volume:23 ,  Issue: 6 )