Scheduled System Maintenance:
On Monday, April 27th, IEEE Xplore will undergo scheduled maintenance from 1:00 PM - 3:00 PM ET (17:00 - 19:00 UTC). No interruption in service is anticipated.
By Topic

An adaptive parallel system dedicated to projective image matching

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)

This paper proposes an adaptive and scalable system prototype for projective image matching. This prototype PC board includes a new parallel systolic VLSI-μPD (implemented in an FPGA (Xilinx Virtex circuit, XCV300), a DSP and a microcontroller only. The μPD circuit is a VLSI dedicated to real-time image line/column matching, which uses the modified dynamic programming algorithm. Its internal architecture is adaptive, in function of more or less hard final application temporal constraints. The architecture adaptativity, scalability and software virtualisation of the μPD circuit permit one to match images of any size. The processing speed (2000 faster than image matching sequential solution), system volume and system cost have been optimised according to A 3C circuit/system design methodology (A 3C-algorithm-architecture adequation under constraints).

Published in:

Image Processing, 2000. Proceedings. 2000 International Conference on  (Volume:2 )

Date of Conference:

10-13 Sept. 2000