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Transpose memory for video rate JPEG compression on highly parallel single-chip digital CMOS imager

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4 Author(s)
Hsieh, J.Y.F. ; Philips Res. Lab., Eindhoven, Netherlands ; van der Avoird, A. ; Kleihorst, R.P. ; Meng, Teresa H.‐Y.

A transpose switch matrix memory (TSMM) is proposed to enable a highly parallel single-chip CMOS sensor/image processor, Xetal, developed at Philips to perform JPEG compression at video rate (30 frames per second, fps) at an image dimension of 640×480 pixels. The integrated solution consists of 320 processing elements and 80 TSMMs, operates at 16 MHz clock rate and 3.3 V supply voltage, and is designed for fabrication at 0.25 micron technology. The processing system can sustain a maximum throughput of 5.12 billion operations per second consuming an estimated 120 mW providing a processing power efficiency of 7 BOPS/Watt. The Xetal architecture is capable of performing pixel level image processing such as fixed pattern noise (FPN) correction, defective pixel concealment, Bayer pattern filtering, RGB-YUV conversion, auto white balancing, and auto exposure control. The TSMM expands support to block level operations including chrominance subsampling, separable 8×8 recursive DCT, and ZZ scan required for JPEG

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Image Processing, 2000. Proceedings. 2000 International Conference on  (Volume:3 )

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