Referenced Items are not available for this document.
In system-on-a-chip design, interfacing of Intellectual Property (IP) blocks is one of the most important issues. Since most IPs are provided by different vendors, they have different interface schemes and different operating frequencies. In this paper, we propose a new interface synthesis method that enables one not only to handle the interface between IPs with different operating frequencies but also to minimize the hardware resource required for the interface. We have demonstrated the proposed algorithm by applying it to a real design example, MP3 decoder, and verified the IIS-to-PCI protocol converter on a real hardware system
Published in:
ASICs, 2000. AP-ASIC 2000. Proceedings of the Second IEEE Asia Pacific Conference on
Date of Conference: 2000
- Page(s):
- 227 - 230
- Meeting Date :
- 28 Aug 2000-30 Aug 2000
- Print ISBN:
- 0-7803-6470-8
- INSPEC Accession Number:
- 6866803
- Conference Location :
- Cheju
- Digital Object Identifier :
- 10.1109/APASIC.2000.896950
- Product Type:
- Conference Publications
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