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Concurrent processing with result sharing: model, architecture, and performance analysis

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2 Author(s)
Krishnaprasad, S. ; Dept. of Comput. Sci. & Eng., Southern Methodist Univ., Dallas, TX, USA ; Shirazi, B.

An efficient computing model, called concurrent processing with result sharing, is introduced. An architecture suitable for executing programs under this model is developed. A performance analysis of this architecture based on a queuing network model is presented to investigate the effect of problem dynamics on the speed of problem solving and the resource requirements. The analysis indicates that, for both coarse- and fine-grain computations, as the amount of recomputation increases, the number of function units needed decreases and the delay at the processor element decreases significantly. For fine-grain computation, the bottlenecks at either the matching unit or the instruction store significantly degrade the system performance. This can only be avoided by using a more expensive multiple-ring architecture

Published in:

Frontiers of Massively Parallel Computation, 1990. Proceedings., 3rd Symposium on the

Date of Conference:

8-10 Oct 1990

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