Test response compaction by an accumulator behaving as a multiple input non-linear feedback shift register

In this paper we show that an accumulator can be modified to behave as a Non-Linear Feedback Shift Register suitable for test response compaction. The hardware required for this modification is less than that required to modify a register to a Multiple Input Linear Feedback Shift Register, MISR. We show with experiments on ISCAS'85, ISCAS'89 benchmark circuits and various types of multipliers that the post-compaction fault coverage obtained by the proposed scheme is higher than that of the already known accumulator based compaction schemes and in most cases identical to that achieved using a MISR.