By Topic

Conversion of small functional test sets of nonscan blocks to scan patterns

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)

Testing nonscan blocks of hardware such as small embedded memories (register files, etc.) can be done using existing scan chains due to the atypically small memory size. FastScan's Macrotest has been developed to solve this problem, and the more interesting problem of concisely and accurately informing the user about the specific hardware and command constraints which prevent successful testing. This allows the user to quickly identify the particular problems, and add DFT or change the patterns to match the architectural and other restraints of the embedding

Published in:

Test Conference, 2000. Proceedings. International

Date of Conference: