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A class of sequential circuits with combinational test generation complexity under single-fault assumption

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3 Author(s)
M. Inoue ; Nara Inst. of Sci. & Technol., Japan ; E. Gizdarski ; H. Fujiwara

We show that the test generation problem for all single stuck-at-faults in sequential circuits with internally balanced structures is reduced into the test generation problem for single stuck-at-faults in combinational circuits. In our previous work, we introduced internally balanced structures as a class of sequential circuits with the combinational test generation complexity. However, single stuck-at-faults on some primary inputs, called separable primary inputs, corresponded to multiple stuck-at faults in a transformed combinational circuit. In this paper we resolve this problem. We show how to generate a test sequence and identify undetectability for single stuck-at-faults on separable primary inputs

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Test Symposium, 2000. (ATS 2000). Proceedings of the Ninth Asian

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