The design of a debugging and performance analysis system that includes a specification language for process-level events and hardware for nonintrusive identification of these events during the execution of parallel and distributed application for a nonshared memory system is presented. The design is based on a formal event/action model and a layered architecture model that have been previously presented. Background, related work, and specification, and identification of events are discussed
Published in:
Distributed Computing Systems, 1990. Proceedings., 10th International Conference on
Date of Conference: 28 May-1 Jun 1990