By Topic

Multibuffer delay line architectures for efficient contention resolution in optical switching nodes

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Chlamtac, I. ; Erik Jonsson Sch. of Eng. & Comput. Sci., Texas Univ., Dallas, TX, USA ; Fumagalli, A. ; Chang-Jin Suh

This paper proposes an efficient contention resolution switching architecture which can serve as the basis for all-optical switching nodes. The presented solution builds on fiber delay lines used as temporary optical storage and 2×2 space photonic switches, a solution principle also known as Quadro or switched delay lines (SDLs). The efficiency of SDLs is fundamentally linked to its storage capacity, i.e., the length of the fiber delay lines, while its cost depends on the number of 2×2 photonic switches, i.e., the number of stages in the switch. This work presents a solution that makes use of multibuffer fiber delay lines which allow multiple packets to be concurrently stored (propagated) on each line. With a novel switch control, it is shown that this solution increases the total storage capacity and significantly improves switch and network performance, without increasing the number of the 2×2 switches in the system, i.e., its cost

Published in:

Communications, IEEE Transactions on  (Volume:48 ,  Issue: 12 )