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Microwave noise modeling of InP based MODFETs biased for low power consumption

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5 Author(s)
J. M. Miranda ; Dept. of Appl. Phys., Univ. Complutense de Madrid, Spain ; M. Nawaz ; P. Sakalas ; H. Zirath
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This paper presents the fabrication, experimental characterization and modeling of 0.15 μm gate-length lattice matched MODFETs based on InP technology. The variation of the drain noise temperature of the Pospieszalski model (T/sub D/) with the applied bias has been investigated under very low power consumption conditions, and a noticeably complex dependence of this factor on the drain current has been observed. In fact, T/sub D/ can decrease with increasing drain currents, and suffers a strong increase as a function of the drain voltage even at very low values of the drain current. However, all of these effects can be qualitatively explained from physical considerations.

Published in:

IEEE Microwave and Guided Wave Letters  (Volume:10 ,  Issue: 11 )