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Processor-farm model for parallel computation of fixed-polarity Reed-Muller expansions

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2 Author(s)
Tan, E.C. ; Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore ; Loh, P.K.K.

A Reed-Muller logic function is usually derived from a given Boolean expression by applying an appropriate conversion technique. Existing conversion algorithms are sequential in nature and are inefficient when the number of variables is large. We propose a processor-farm paradigm which allows the conversion to be performed by a few processors in a parallel and efficient manner

Published in:

TENCON 2000. Proceedings  (Volume:2 )

Date of Conference:

2000

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