By Topic

VLSI algorithms, architectures, and implementation of a versatile GF(2m) processor

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Hasan, M.A. ; Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada ; Wassal, A.G.

With the explosive growth of electronic commerce, dedicated cryptographic processors are becoming essential since general-purpose processors cannot provide the performance and functionality directly needed, This paper proposes an architecture for a versatile Galois field GF(2m) processor for cryptographic applications. This processor uses both canonical and triangular bases for field elements representation and manipulation. The variable dimension datapath of the processor is versatile enough to meet the varying requirements for different applications and environments. To provide flexibility for different cryptographic applications, an instruction set architecture is designed. Finally, a prototype VLSI implementation of the Galois field processor is presented and discussed

Published in:

Computers, IEEE Transactions on  (Volume:49 ,  Issue: 10 )