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Self-configuration of a large area integrated multiprocessor system for video applications

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5 Author(s)
Rudack, M. ; Lab. for Inf. Technol., Hannover Univ., Germany ; Redeker, M. ; Treytnar, D. ; Mende, O.
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We present a configuration technique for a Large Area Integrated Circuit (LAIC) which is manufactured by wafer stepping. A LAIC consists of four identical subsystems, i.e., a subsystem is the only building block of a LAIC and contains base cells or processing nodes as well as interconnects and pad cells. To ensure a proper cooperation of all subsystems and to enable communication between the subsystems, an on-chip self-configuration scheme is realized. Therefore, not only the subsystems are configured, but also the global bus system, connecting all subsystems. Two methods for configuration are applied: static and dynamic. The processing nodes, the pad cells, and the input bus systems are configured statically. The output and the bidirectional bus system need a dynamic configuration, since they depend on the current state of the LAIC (e.g., which subsystem is accessing the bus). The presented approach increases the area but enables to manufacture LAICs, consisting of only one building block, by wafer stepping with minimum configuration effort. The LAIC is manufactured in a standard 0.25 μm 6 metal layer embedded DRAM process with a die size of 16.89 cm2

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Defect and Fault Tolerance in VLSI Systems, 2000. Proceedings. IEEE International Symposium on

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