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A new model of exploiting loop parallelization using knowledge-based techniques

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5 Author(s)
Chao-Tung Yang ; Ground Syst. Sect., Nat. Space Program Office, Hsinchu, Taiwan ; Shian-Shyong Tseng ; Chang-Jiun Tsai ; Cheng-Der Chuang
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We concentrate on three fundamental phases, data dependence testing, parallel loop transformation, and parallel loop scheduling, for loop parallelization in parallelizing compilers, running on multiprocessor systems. A new model of exploiting loop parallelization by using knowledge-based techniques is first proposed. The knowledge-based approach integrates existing data dependence tests, loop transformations and loop schedules, to make good use of their abilities for extracting more parallelism. Three rule-based systems, called the K-Test, IPLS and KPLT, are then developed by repertory grid analysis and an attribute ordering table to construct the knowledge base, respectively. These systems can choose an appropriate test, transform and schedule, then apply the resulting methods to perform loop parallelization and gain a high speedup rate. For example, the KPLT can choose the appropriate loop transformations to reorder the execution of statements and loop iterations for parallelization. Unlike the previous researches that must use the one-pass approach, we introduce the idea of multipass which may explore more parallelism of loops. Experimental results show that our new model can achieve higher speedup on parallelizing compilers. Furthermore, for system maintenance and extensibility, our approach is obviously superior to others

Published in:

Parallel and Distributed Systems: Workshops, Seventh International Conference on, 2000

Date of Conference:

Oct 2000