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A channel-erasing 1.8-V-only 32-Mb NOR flash EEPROM with a bitline direct sensing scheme

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15 Author(s)
Atsumi, S. ; Memory LSI Res. & Dev. Centre, Toshiba Semicond. Co., Yokohama, Japan ; Umezawa, A. ; Tanzawa, T. ; Taura, T.
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A 1.8-V-only 32-Mb NOR flash EEPROM has been developed based on the 0.25-/spl mu/m triple-well double-metal CMOS process. A channel-erasing scheme has been implemented to realize a cell size of 0.49 /spl mu/m/sup 2/, the smallest yet reported for 0.25-/spl mu/m CMOS technology. A block decoder circuit with a novel erase-reset sequence has been designed for the channel-erasing operation. A bitline direct sensing scheme and a wordline boosted voltage pooling method have been developed to obtain high-speed reading operation at low voltage. An access time of 90 ns at 1.8 V has been realized.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:35 ,  Issue: 11 )