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Comparative study of parallel algorithms for 3-D capacitance extraction on distributed memory multiprocessors

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2 Author(s)
Yanhong Yuan ; Dept. of Electr. & Comput. Eng., Northwestern Univ., Evanston, IL, USA ; Banerjee, P.

Very fast and accurate 3-D capacitance extraction is essential for ultra deep sub-micron design (UDSM) of integrated circuits. Parallel processing provides an approach to reducing the simulation turn-around time. In this paper, we present two parallel formulations for 3-D capacitance extraction, based on the fast multipole method (FMM) and the direct boundary element method (BEM), respectively. We report detailed comparison results on parallel efficiency and memory scalability, on three different distributed memory platforms, including a 16 processor IBM SP2, and ATM network of 16 HP workstations, and an Ethernet network of 16 HP workstations

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Computer Design, 2000. Proceedings. 2000 International Conference on

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