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Low power DSP's for wireless communications

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2 Author(s)
I. Verbauwhede ; Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA ; C. Nicol

Wireless communications and more specifically, the fast growing penetration of cellular phones and cellular infrastructure are the major drivers for the development of new programmable Digital Signal Processors (DSP's). In this tutorial, an overview is given of recent developments in DSP processor architectures, that makes them well suited to execute computationally intensive algorithms typically found in communications systems. DSP processors have adapted instruction sets, memory architectures and data paths to execute compute intensive communications algorithms efficiently and in a low power fashion. Basic building blocks include convolutional decoders (mainly the Viterbi algorithm), turbo coding algorithms, FIR filters, speech coders, etc. This is illustrated with examples of different commercial and research processors.

Published in:

Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on

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