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Low power sequential circuit design using priority encoding and clock gating

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2 Author(s)
Xunwei Wu ; Inst. of Circuits & Syst., Ningbo Univ., Zhejiang, China ; Pedram, M.

This paper presents a state assignment technique called priority encoding, which uses multi-code assignment plus clock gating to reduce power dissipation in sequential circuits. The basic idea is to assign multiple codes to states so as to enable more effective clock gating in the sequential circuit. Practical design examples are studied and simulated by PSPICE. Experimental results demonstrate that the priority encoding technique can result in sizable power saving.

Published in:

Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on

Date of Conference:

2000