Toward analog circuit synthesis: a global methodology based upon design of experiments

An analog design methodology taking advantages of design of experiments for global optimization purposes is described. Starting with hierarchically based topology, this approach largely reduces simulation cost to reach an efficient result with regards to a user-defined objective function. The design of a fully BiCMOS low noise amplifier is detailed as an example: among the roughly 8200 possible combinations, only fifty simulations lead to what might be the best architecture. A test chip demonstrates the methodology ability to extrapolate high performance circuits.