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Compiling and optimizing image processing algorithms for FPGAs

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8 Author(s)
Draper, B. ; Dept. of Comput. Sci., Colorado State Univ., Fort Collins, CO, USA ; Najjar, W. ; Bohm, W. ; Hammes, J.
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This paper presents a high-level language for expressing image processing algorithms, and an optimizing compiler that targets FPGAs. The language is called SA-C, and this paper focuses on the language features that 1) support image processing, and 2) enable efficient compilation to FPGAs. It then describes the compilation process, in which SA-C algorithms are translated into non-recursive data flow graphs, which in turn are translated into VHDL. Finally, it presents performance numbers for some well-known image processing routines, written in SAC and automatically compiled to an Annapolis Microsystems WildForce board with Xilinx 4036XL FPGAs

Published in:
Computer Architectures for Machine Perception, 2000. Proceedings. Fifth IEEE International Workshop on

Date of Conference: 2000

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