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Design of a sense circuit for low-voltage flash memories

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4 Author(s)
Tanzawa, T. ; Memory LSI R&D Center, Toshiba Corp., Yokohama, Japan ; Takano, Y. ; Taura, T. ; Atsumi, S.

A new sense circuit directly sensing the bitline voltage is proposed for low-voltage flash memories. A simple reference voltage generation method and a dataline switching method with matching of the stray capacitance between the dataline pairs are also proposed. A design method for the bitline clamp load transistors is described, taking bitline charging speed and process margins into account. The sense circuit was implemented in a 32-Mb flash memory fabricated with a 0.25-/spl mu/m flash memory process and successfully operated at a low voltage of 1.5 V.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:35 ,  Issue: 10 )