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A new poly-Si thin-film transistor with poly-Si/a-Si double active layer

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4 Author(s)
Park, Kee-Chan ; Sch. of Electr. Eng., Seoul Nat. Univ., South Korea ; Choi, Kwon-Young ; Yoo, Juhn-Suk ; Min-Koo Han

A new poly-Si TFT employing a rather thick poly-Si (400 /spl Aring/)/a-Si(4000 /spl Aring/) double active layer is proposed and fabricated in order to improve the stability of poly-Si TFT without sacrificing the on/off current ratio. Due to the thick double layer the on-state drain current of the proposed TFT flows through a broad current path near the drain junction so that the current density in the drain depletion region where large electric field is applied is considerably reduced. Consequently, additional trap state generation attributed to large current flow and large electric field in poly-Si channel decreases and the electrical stability of the proposed device has been considerably improved.

Published in:

Electron Device Letters, IEEE  (Volume:21 ,  Issue: 10 )