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Variations of interconnect capacitance and RC delay induced by process fluctuations

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1 Author(s)
N. Shigyo ; Syst. LSI Design Div., Toshiba Corp., Yokohama, Japan

This article describes the influence of the process fluctuations such as the critical dimension (CD) variation on the interconnect capacitance C and RC delay. It is found that there is a tradeoff between C and RC delay variations because of the fringing capacitance. A new interconnect design guideline to reduce C and/or RC delay variations is proposed

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Statistical Metrology, 2000 5th International Workshop on

Date of Conference: