By Topic

Numerical simulations of surface states effects on GaAs power MESFETs

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Francis, P. ; Microelectron. Res. Labs., NEC Corp., Ibaraki, Japan ; Ohno, Yasuo ; Nogome, M. ; Yuji Takahashi

Summary form only given. The effects of surface states on the gate offset regions of GaAs power MESFETs are analyzed using a two-dimensional device simulator with a Shockley-Read-Hall statistics model for the surface states. Assuming electron trap type surface states and hole trap type surface states, it is found that the trap properties cause a large difference in DC performance and pulse operation of the FETs.

Published in:

Simulation of Semiconductor Processes and Devices, 1996. SISPAD 96. 1996 International Conference on

Date of Conference:

2-4 Sept. 1996