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Computer-aided analysis of on-chip interconnects near semiconductor substrate for high-speed VLSI

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3 Author(s)
Zheng-Yu Yuan ; Dept. of Electron. Eng., Shanghai Jiaotong Univ., China ; Zheng-Fan Li ; Min-Liu Zou

In this paper, we present some numerical techniques for the time-domain characterization of on-chip interconnects near semiconductor substrate in high-speed very large scale integrated circuits. A time-domain full-wave method for the extraction of frequency-dependent equivalent circuit parameters of these lines is described first. Then the method, based on numerical inversion of Laplace transform, is used for the transient simulation of interconnection lines with frequency-dependent parameters. The frequency-dependent effects over a very broad range of frequencies are included in the analysis. A numerical example for realistic geometry and material parameters demonstrates the effects of lossy substrate on the signal propagation, including delay, waveform distortion and crosstalk

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:19 ,  Issue: 9 )