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High-speed parallel-prefix module 2n-1 adders

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5 Author(s)
Kalampoukas, L. ; Xebeo Commun. Inc., South Plainfield, NJ, USA ; Nikolos, D. ; Efstathiou, C. ; Vergos, H.T.
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A novel parallel-prefix architecture for high speed module 2n -1 adders is presented. The proposed architecture is based on the idea of recirculating the generate and propagate signals, instead of the traditional end-around carry approach. Static CMOS implementations verify that the proposed architecture compares favorably with the already known parallel-prefix or carry look-ahead structures

Published in:

Computers, IEEE Transactions on  (Volume:49 ,  Issue: 7 )

Date of Publication:

Jul 2000

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