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High level modeling for parallel executions of nested loop algorithms

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4 Author(s)
E. F. Deprettere ; Leiden Univ., Netherlands ; E. Rijpkema ; P. Lieverse ; B. Kienhuis

High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications (algorithms) and the implementations (architecture), a mapping of the former into the latter and a simulator for fast execution of the whole. Signal processing algorithms are very often nested-loop algorithms with a high degree of inherent parallelism. This paper presents-for such applications-suitable application and implementation models, a method to convert a given imperative executable specification to a specification in terms of the application model, a method to map this specification into an architecture specification in terms of the implementation model, and a method to analyze the performance through simulation. The methods and tools ore illustrated by means of an example

Published in:

Application-Specific Systems, Architectures, and Processors, 2000. Proceedings. IEEE International Conference on

Date of Conference:

2000