Referenced Items are not available for this document.
With the development of mobile communication and portable electronic devices, minimising the average power dissipation has become a primary concern for very large scale integrated (VLSI) circuit design. The authors map a circuit into a weighted acyclic graph (WAG), and propose a criterion for partitioning the WAG into two disjoint graphs with a minimum ratio-cut cost
Published in:
Electronics Letters
(Volume:36
,
Issue:
16
)
Date of Publication: 3 Aug 2000
- Page(s):
- 1346 - 1347
- ISSN :
- 0013-5194
- INSPEC Accession Number:
- 6679651
- Digital Object Identifier :
- 10.1049/el:20000961
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- 3 Aug 2000
- Sponsored by :
- Institution of Engineering and Technology
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