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Design and implementation of an ABR server in a shared-bus ATM switch

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2 Author(s)
Zervanos, E. ; Div. of Comput. Sci., Nat. Tech. Univ. of Athens, Greece ; Stassinopoulos, G.

This paper concerns the design and development of an available bit rate (ABR) server as part of an asynchronous transfer mode (ATM) switch. The overall implementation is based on a shared medium switching architecture, a time division multiplexed (TDM) bus, providing both modularity and high reliability. The paper focuses on hardware architecture of the entire system and presents its basic software architecture

Published in:

Computers and Communications, 2000. Proceedings. ISCC 2000. Fifth IEEE Symposium on

Date of Conference:

2000