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Yield and matching implications for static RAM memory array sense-amplifier design

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3 Author(s)
S. J. Lovett ; Cypress Semicond., San Jose, CA, USA ; G. A. Gibbs ; A. Pancholy

The effects of MOS transistor mismatch upon sense-amplifier yield in synchronous static RAM memories is investigated. The matching characteristics of the two transistor layout styles are compared, a general formula is derived for calculating the statistical likelihood of the sense amplifier failing to read correct data given transistor size and input differential voltage, recommendations are made for optimizing size/speed/reliability trade-offs.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:35 ,  Issue: 8 )