Referenced Items are not available for this document.
A 24-bit 192-kHz sample-rate digital-to-analog converter (DAC) achieves 120-dB A-weighted dynamic range in the 20-kHz band, and consumes 310 mW with a 5-V power supply. A third-order five-bit /spl Delta//spl Sigma/ architecture optimized for high-end consumer audio has been developed and used. A switched-capacitor (SC) DAC combined with infinite-impulse response (IIR) and finite-impulse response (FIR) filters is employed to increase immunity to clock jitter, and reduce analog power. Partial-range dynamic element matching (DEM) enhances mismatch shaping with reduced circuit overhead. The 7.8-mm/sup 2/ chip fabricated in 0.5-/spl mu/ m CMOS integrates a stereo DAC and all functions required for DVD-audio playback.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:35
,
Issue:
8
)
Date of Publication: Aug. 2000
- Page(s):
- 1066 - 1073
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 6693520
- Digital Object Identifier :
- 10.1109/4.859495
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Aug. 2000
- Sponsored by :
- IEEE Solid-State Circuits Society
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