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Digital correction of circuit imperfections in cascaded Σ-Δ modulators composed of 1st-order sections

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4 Author(s)
Davis, A.J. ; Rhode Island Univ., Kingston, RI, USA ; Fischer, G. ; Hans-Helge, A. ; Hess, J.

An approach to remove the effects of amplifier finite gain and C-ratio mismatches in the 1-1-1 (MASH) and the 1-1-1-1 cascaded sigma-delta modulator is presented. By correcting the digital outputs with estimates of the parasitic errors due to analog circuit imperfections, uncancelled quantization noise terms can be removed. A 1-1-1-1 cascaded modulator, implemented as a fully differential switched-capacitor circuit, has been fabricated in a 1.2 μm, double-poly, n-well CMOS process. Measurements of the modulator verify that for an amplifier gain of 60 dB, C-ratio mismatch errors of 0.52% and 0.054%, the error correction offers an overall improvement in SNDR of 12-22 dB. A 12 μVrms sine wave can be restored with a positive SNDR

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Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on  (Volume:5 )

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