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Parallel architectures for decision-directed RLS-equalization

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3 Author(s)
Drewes, C. ; Inst. for Integrated Circuits, Tech. Univ. Munchen, Germany ; Hammerschmidt, J.S. ; Hutter, A.A.

Parallel architectures for decision-directed adaptive recursive least-squares (RLS) equalizers based on a QR-decomposition (QRD) using square-root free Givens-rotations are derived that allow very high throughput for broadband applications. We apply an algorithmic optimization that leads to the use of additional fast adder trees together with a re-timing of the required arithmetic components to maximize throughput. A hybrid RLS/least-mean-squares equalizer is further proposed allowing even higher throughput. The complexity of the resulting equalizer structures is compared for an eight-tap decision-feedback equalizer in terms of an equivalent NAND gate count

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Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on  (Volume:5 )

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