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Which is cooler, trench or multi-epitaxy? Cutting edge approach for the silicon limit by the super trench power MOS-FET (STM)

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6 Author(s)
Minato, T. ; ULSI Dev. Center, Mitsubishi Electr. Corp., Kumomoto, Japan ; Nitta, T. ; Uenisi, A. ; Yano, M.
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STM structure makes it possible to break through the Si limit via new RESURF effect in very tight periodic p and n columns repetition by using deep trench technology and trench sidewall ion implantation. In a wide breakdown voltage range from 200 to 1000 V, STM also gives greatly improved electrical characteristics at the cost of only one extra mask step in the DMOS fabrication wafer process procedure

Published in:

Power Semiconductor Devices and ICs, 2000. Proceedings. The 12th International Symposium on

Date of Conference:

2000