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Low complexity VLSI implementation of a joint successive interference cancellation with interleaving scheme

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3 Author(s)
Bob Ka-Man Wong ; Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China ; Chi-ying Tsui ; Cheng, R.S.K.

The performance of wideband code division multiple access (WCDMA) can be severely degraded as the number of users increases due to the increase in interference. Multi-user detection is a scheme, which can cancel the interference generated by other users and hence can improve the system capacity. Recently a joint successive interference cancellation with interleaving (JSICI) scheme has been proposed for multi-user detection. However the complexity of the scheme is very high. In this paper, we propose a low complexity architecture which can implement this JSICI scheme efficiently in VLSI. Also low power features are proposed

Published in:

Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on  (Volume:2 )

Date of Conference:

2000