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Dual-monotonic domino gate mapping and optimal output phase assignment of domino logic

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2 Author(s)
Min Zhao ; Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA ; Sapatnekar, S.S.

In this paper two problems on domino logic synthesis are addressed. A mapping method that maps the complementary logic cones independently when AND/OR logic is to be implemented and together using dual-monotonic gates in the case of XOR/XNOR logic, is proposed. The results show up to 28.9% improvement in area and always show the same or better performance in delay over existing approaches. Then a 0-1 integer programming formulation is provided for the output phase assignment problem for domino logic. It considers the cost difference between two polarities and enables a standard linear programming package to be used to solve the problem. The results show up to 41.0% improvement in area

Published in:

Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on  (Volume:2 )

Date of Conference:

2000