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A barrier metallization technique on copper substrates for soldering applications

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4 Author(s)
So, W.W. ; Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA ; Choe, S. ; Chuang, R. ; Lee, C.C.

In electronic products, copper has been widely used as substrates to mount semiconductor chips and electronic components using soft and ductile solders such as lead-tin alloys. The soft solder helps release the stress developed in a bonded structure through plastic strains to prevent device fracture. If copper atoms diffuse into the solder, the growth of intermetallics can make the solder joint less ductile, leading to stress increase on the bonded structure during thermal cycling as the solder joint becomes hardened. Thus, prevention of copper diffusion into solder is needed in applications where the solder joint must remain soft and ductile during long term device operation. In this paper, we report a metallization process to produce a composite barrier layer on copper substrates. To test the barrier effectiveness, indium is chosen as the solder medium because of its wide applications in bonding photonic devices. The same process can be easily incorporated for use with other solders such as Pb-Sn alloys with equal effectiveness. The composite barrier consists of a nickel buffer layer fabricated by an electroless process and a chromium layer deposited by vacuum thermal evaporation. The solder joint is manufactured by an oxidation-free fluxless technology. High quality joints are obtained consistently as determined by a scanning acoustic microscope. Scanning electron microscope (SEM) with energy dispersive X-ray (EDX) was used to evaluate cross sections of bonded samples. No sign of copper diffusion through the barrier was detected on the cross section. No visible intermetallic grains are detected. The Ni and Cr layers are clearly seen. This result clearly indicates that the barrier metallization did block the copper atoms. Consequently, Cu-In intermetallic growth in the joint is inhibited. Result of acceleration test predicts no intermetallic growth for 12.3 years of continuous device operation even at a solder joint temperature as high as 90°C

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Electronic Components & Technology Conference, 2000. 2000 Proceedings. 50th

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