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A 2 GHz CMOS double conversion downconverter with robust image rejection performance against the process and temperature variations

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3 Author(s)
Eunseok Song ; Syst. Design Group, Seoul Nat. Univ., South Korea ; Soo-Ik Chae ; Wonchan Kim

This paper presents a 2 GHz image rejection (IR) downconverter implemented in a 0.65 /spl mu/m CMOS technology. It maintains high IR ratio against the process and temperature variations if the on-chip passive RC components are relatively matched. The experimental circuit provides an IR ratio of 40.8 dB without any off-chip filtering or tuning, and dissipates 91 mW at 3.3 V.

Published in:

VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on

Date of Conference:

15-17 June 2000

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