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Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling [CMOS technology]

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2 Author(s)
Wen-Chin Lee ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; Chenming Hu

A model is proposed to quantify the tunneling currents through ultra-thin gate oxides. With a proper set of effective mass and barrier height, this new model can accurately predict the gate and substrate currents and all the subcomponents in dual-gate CMOS devices. This model can also be employed to extract T/sub ox/ for thin oxide from I-V data with 0.1/spl Aring/ sensitivity, where C-V extraction can be difficult or impossible.

Published in:

VLSI Technology, 2000. Digest of Technical Papers. 2000 Symposium on

Date of Conference:

13-15 June 2000