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A modular 0.13 /spl mu/m bulk CMOS technology for high performance and low power applications

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14 Author(s)
Han, L.K. ; Microelectron Div., IBM Corp., Hopewell Junction, NY, USA ; Biesemans, S. ; Heidenreich, J. ; Houlihan, K.
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A leading-edge 0.13 /spl mu/m generation CMOS technology is presented as a platform for systems on a chip (SOC) applications. A modular triple gate oxide process concept is introduced for the first time to allow the optimization of high performance devices, low leakage devices, and I/O devices independently. Process commonality is also achieved to support deep-trench based embedded DRAM. Seven levels of Cu interconnects integrated with low-k ILD have been developed. With mature KrF 248 nm lithography and optical enhancement techniques, aggressive design rules are achieved to meet the circuit density requirement. A 2.48 /spl mu/m/sup 2/ functional 6T-SRAM cell is demonstrated.

Published in:

VLSI Technology, 2000. Digest of Technical Papers. 2000 Symposium on

Date of Conference:

13-15 June 2000