This paper describes a high-speed serial port design approach which uses standard ASIC libraries, tools and design methodologies. Leveraging existing backend ASIC tools and technology enabled us to place, route, and verify serial links running up to 622 Mb/s. Our approach has been implemented on multiple chips and validated with a detailed comparison of Spice to static timing analysis
Published in:
Custom Integrated Circuits Conference, 2000. CICC. Proceedings of the IEEE 2000
Date of Conference: 2000